硬體

AI 晶片、GPU、資料中心、邊緣裝置與硬體安全。

AI 基礎設施

Etched Unveils Rack-Scale Inference Architecture, Challenging GPUs with Low-Voltage Compute and Cluster-Shared Memory

Etched’s first N4P inference chips have entered rack-level validation. The system uses low-voltage compute arrays and cluster-scale memory to address throughput and latency bottlenecks, respectively. The company claims sparse MoE workloads can sustain more than 80% of peak FLOPs, but has yet to publish reproducible model, power, or end-to-end performance data.

最新模型

Cosmos 3 Edge Shrinks the World Model to 4B, Handling Vision, Text, and Robot Actions on a Single GPU

NVIDIA has released the Cosmos 3 Edge weights and inference pipeline, combining autoregressive reasoning and diffusion-based multimodal generation in a 4B Mixture-of-Transformers model. The model accepts text, images, and action trajectories, and a robot policy variant fine-tuned on DROID data is also available, though physical consistency and edge-device latency still require independent verification.

科學機器學習

UNICON Unifies Nine Classes of Numerical Systems With 41.6 Million Parameters, Enabling Cross-Domain Forecasting With Frozen Weights

UNICON converts data from rivers, traffic networks, power grids, weather systems, and human mobility into a shared graph-sequence interface, using a small number of numerical examples to specify new tasks in context. In unseen domains such as web traffic, the model approaches the performance of specialized models, but it has so far been validated only on forecasting tasks, and neither its weights nor code have been released.

實體 AI/科學自動化

PUDA Connects Laboratory Agents Through a Constrained CLI and Event Logs, Isolating Generative Planning from the Hardware Driver Layer

PUDA exposes automated instruments as discoverable command-line tools and uses JSON, NATS/JetStream, and stable identifiers to preserve commands, measurements, and sample provenance. Agents can choose the next experiment, but actual hardware operations can occur only through engineer-authored driver methods with validated parameters.

硬體

ACE-RTL Has Nemotron Iteratively Compile and Fix Verilog, Achieving a 97.1% Average Pass Rate Across Nine Task Categories

NVIDIA integrated Nemotron 3 Ultra into a “generate-test-reflect” RTL agent loop, achieving a 97.1% average pass rate across nine agentic task categories in CVDP. The results show that executable verification can significantly strengthen chip-design models, although data overlap, tool configurations, and vendor-run evaluations still limit generalizability.

最新模型

Kimi K3 Releases 2.8T MoE Weights, With 104B Active Parameters Raising the Self-Hosting Bar to Cluster Scale

Moonshot AI has officially released the Kimi K3 weights and technical report. The model features native vision, a one-million-token context window, and activates 16 of 896 experts for each token. The open weights finally make the company’s capability claims reproducible, but more than 1 TB of low-precision weights still put full deployment beyond ordinary workstations.

推論系統

NInfer Hard-Codes Inference Paths for Two Qwen3.6 Models, Reaching 543 Tokens per Second in Long-Context Decoding on a Single RTX 5090

The open-source NInfer uses custom quantization, weight layouts, fused kernels, and an MTP draft path to sustain long-context decoding at about 543 tokens per second for Qwen3.6-35B-A3B on a single RTX 5090. Its speed comes from deep specialization for the model and GPU, but it currently supports only two checkpoints, lacks continuous batching, and has yet to be independently benchmarked under identical conditions.