AI 基礎設施
Etched Unveils Rack-Scale Inference Architecture, Challenging GPUs with Low-Voltage Compute and Cluster-Shared Memory
Etched’s first N4P inference chips have entered rack-level validation. The system uses low-voltage compute arrays and cluster-scale memory to address throughput and latency bottlenecks, respectively. The company claims sparse MoE workloads can sustain more than 80% of peak FLOPs, but has yet to publish reproducible model, power, or end-to-end performance data.

AI chip startup Etched has unveiled the design direction of its first rack-scale inference system and said its A0 chips, manufactured on TSMC’s N4P process, have returned from the fab and are undergoing validation with customers for the initial products. Rather than selling standalone accelerator cards, the company is co-designing the chips, packaging, power delivery, liquid cooling, interconnects, compiler, and racks. The system targets multi-trillion-parameter sparse MoE models, long-context workloads, and agentic workloads.
The first core technology is Low Voltage Inference (LVI). Etched says its compute blocks can operate at less than half the voltage of conventional AI chips, while partitionable matrix arrays, scheduling, and power-delivery design improve FLOPs density. The company claims that the system can utilize more than 80% of peak FLOPs when running trillion-parameter sparse MoE models, avoiding power- and thermal-induced throttling under heavy load. If this metric carries over to complete models, it could improve large-batch prefill performance and throughput. However, matrix-unit utilization is not equivalent to tokens per watt and does not account for routing, communication, or KV cache costs.
The second technology, Cluster Scale Memory (CSM), targets low-batch, latency-sensitive decode workloads. The concept allows chips within a rack to access a larger shared memory pool, reducing data movement when model weights or the KV cache are partitioned because of per-card capacity limits. However, Etched has not yet disclosed the consistency model, memory bandwidth, remote-access latency, or failure domains, and no independently verifiable production results are available.
Engineering teams should next focus on TTFT, TPOT, throughput per watt, and tail latency on real-world models, as well as whether the software stack can support rapidly evolving attention and MoE architectures. Etched has said its first racks will ship this summer, but until third-party benchmarks are available, LVI and CSM should still be regarded as architectural claims made by the vendor.