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Waymo Unveils 5nm In-Vehicle ASIC: Over 1,000 TOPS for Front-End Sensor Processing
Waymo has disclosed its Robotaxi heterogeneous computing architecture for the first time. Its custom ASICs process camera, lidar, and radar data in real time before passing it to the core inference engine. Because the stated 1,000 TOPS figure does not specify numerical precision or power consumption, it cannot be directly compared with NVIDIA’s or Tesla’s full-vehicle platforms.
On August 20, Waymo provided the first detailed look at its Robotaxi in-vehicle computing system, centered on a set of custom ASICs manufactured on a 5nm process. Positioned at the front end of the sensor data pipeline, these chips extract features from raw camera, lidar, and radar streams, perform temporal denoising and run portions of neural networks, then send the processed data to the inference engine responsible for sensor fusion and driving decisions. Therefore, the company’s claim of more than 1,000 TOPS does not represent the total compute performance of the entire Waymo Driver system, nor is it equivalent to a standalone processor capable of running an end-to-end autonomous-driving model.
The technical value of this division of labor lies in reducing data movement and “pixel-to-actuation” latency. Autonomous-driving systems typically process continuous streams with small batch sizes, so the peak throughput of data-center GPUs does not necessarily translate into equivalent real-time performance. Hardwiring fixed, high-frequency preprocessing, convolution, or Transformer workloads into ASICs can potentially improve latency, power consumption, and compute density. Waymo says raw compute capability has increased by approximately 20× over eight years. The system also uses two parallel compute engines for redundancy, preventing a single hardware failure from immediately interrupting driving operations.
However, Waymo did not disclose whether its TOPS figure is based on INT8, INT4, or another numerical precision. It also provided no figures for chip power consumption, memory bandwidth, die area, measured latency, or performance per watt. The system still incorporates components from AMD, NVIDIA, Micron, Samsung, Sandisk, Socionext, and TSMC, indicating that it is a heterogeneous architecture rather than a fully in-house design. Engineering teams should next watch for disclosures about Waymo’s compiler, model-mapping methods, and the ASICs’ end-to-end performance relative to earlier FPGAs or general-purpose accelerators. Until such data becomes available, the 1,000 TOPS figure should be treated only as a capacity metric.