AI 晶片／邊緣視覺
ETHEREAL Processes VGA Event Vision With a Spatiotemporal Event Cache, Measuring 25.6 Microseconds of Inference per Event
The 28 nm ETHEREAL chip separates irregular event-graph access from regular spline convolution and supports per-layer 4/8-bit precision. DAGr-GNN measurements reached 25.6 microseconds and 1.6 microjoules per event, although the final three detection-head layers were still evaluated off-chip.
An ETHEREAL preprint posted on August 18 introduces a 28 nm processor designed specifically for event-driven graph neural networks. Event cameras do not output complete frames; instead, they generate timestamped events when pixel brightness changes, preserving microsecond-scale temporal resolution. The challenge is that their graph structures combine sparse, irregular neighbor access with regular, dense neural-network computation, making it difficult for conventional CNN accelerators to utilize both efficiently.
ETHEREAL processes graph convolutions using a neighbor-parallel spline-convolution datapath and divides its 1.25 MB memory into separate regions for three-dimensional spatiotemporal events and two-dimensional features. A region-based spatiotemporal cache reduces external-memory accesses by up to 60% during the 3D stage and eliminates them during the 2D stage. Compared with sequential per-neighbor processing, parallel convolution reduces execution time by as much as 3.8× on average. The chip can also switch between 4-bit and 8-bit precision by operand, allowing accuracy, energy consumption, and latency to be adjusted at deployment time.
Using the 640×480 DSEC automotive event dataset and DAGr-GNN, the authors selected an 8b/8b configuration for the YOLO-like head and 4b/4b for the remaining layers. They report end-to-end latency of 25.6 microseconds and energy consumption of 1.6 microjoules per event. Across different precision configurations, the reported ranges are approximately 20.1–40.1 microseconds and 1.2–2.5 microjoules. The ESSERC 2026 accepted-paper page lists the same latency but gives energy consumption as 1.7 microjoules, suggesting a versioning or rounding difference.
The results demonstrate that high-resolution event graphs can be processed directly by specialized silicon without first being compressed into conventional frames. However, the system measurements cover only ten segments of 1,000 events each, and the final three layers of the YOLO-like head were evaluated off-chip at full precision. The figures therefore cannot be directly equated with the latency or energy consumption of a complete sensor-to-detection pipeline. The preprint remains under submission to IEEE JSSC, and neither the chip nor a complete hardware implementation has been made available for independent verification.